ViperEkura
3439e3104e
- Thread a cudaStream_t through attn dispatchers onto torch's current stream - Scope the device guard to the entry function so kernels run on tensor device - DISPATCH_HEAD_DIM now forwards varargs so stream reaches each dispatch - Parallelize CPU reference kernels with OpenMP (paged test 31s -> 7s) - Merge decode/prefill standalone tests into attn_test.cu with correctness tables - Drop bench error column (CPU ref too slow at large sizes) - Update cuda_kernels.md for the merged test layout
99 lines
3.4 KiB
Plaintext
99 lines
3.4 KiB
Plaintext
#include <torch/extension.h>
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#include <c10/cuda/CUDAGuard.h>
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#include <c10/cuda/CUDAException.h>
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#include <cuda_bf16.h>
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__global__ void rotary_emb_kernel(
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const __nv_bfloat16* __restrict__ x,
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const float* __restrict__ freqs_cis,
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__nv_bfloat16* __restrict__ out,
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int batch,
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int seq_len,
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int n_heads,
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int head_dim
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) {
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const int half_dim = head_dim >> 1;
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const int total = batch * seq_len * n_heads * half_dim;
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for (int idx = blockIdx.x * blockDim.x + threadIdx.x;
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idx < total;
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idx += gridDim.x * blockDim.x) {
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int pair = idx % half_dim;
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int tmp = idx / half_dim;
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int head = tmp % n_heads;
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tmp /= n_heads;
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int seq = tmp % seq_len;
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int b = tmp / seq_len;
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int x_offset = ((b * seq_len + seq) * n_heads + head) * head_dim + (pair << 1);
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int cs_offset = ((b * seq_len + seq) * half_dim + pair) * 2;
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__nv_bfloat162 x_pair = *reinterpret_cast<const __nv_bfloat162*>(x + x_offset);
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float x_even = __bfloat162float(__low2bfloat16(x_pair));
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float x_odd = __bfloat162float(__high2bfloat16(x_pair));
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float c = freqs_cis[cs_offset];
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float s = freqs_cis[cs_offset + 1];
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float out_even = x_even * c - x_odd * s;
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float out_odd = x_even * s + x_odd * c;
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__nv_bfloat162 out_pair = __floats2bfloat162_rn(out_even, out_odd);
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*reinterpret_cast<__nv_bfloat162*>(out + x_offset) = out_pair;
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}
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}
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torch::Tensor rotary_emb(
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torch::Tensor x,
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torch::Tensor freqs_cis
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) {
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const at::cuda::OptionalCUDAGuard device_guard(device_of(x));
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auto stream = at::cuda::getCurrentCUDAStream();
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TORCH_CHECK(x.is_cuda(), "x must be on CUDA");
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TORCH_CHECK(freqs_cis.is_cuda(), "freqs_cis must be on CUDA");
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TORCH_CHECK(x.scalar_type() == torch::kBFloat16, "x must be bf16");
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TORCH_CHECK(x.dim() == 4, "x must be 4D [batch, seq_len, n_heads, head_dim]");
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TORCH_CHECK(x.is_contiguous(), "x must be contiguous");
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TORCH_CHECK(freqs_cis.dim() == 4, "freqs_cis must be 4D [batch, seq_len, dim/2, 2]");
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TORCH_CHECK(freqs_cis.is_contiguous(), "freqs_cis must be contiguous");
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TORCH_CHECK(freqs_cis.scalar_type() == torch::kFloat32, "freqs_cis must be f32");
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int batch = x.size(0);
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int seq_len = x.size(1);
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int n_heads = x.size(2);
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int head_dim = x.size(3);
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TORCH_CHECK(head_dim % 2 == 0, "head_dim must be even");
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TORCH_CHECK(freqs_cis.size(0) == batch, "freqs_cis batch mismatch");
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TORCH_CHECK(freqs_cis.size(1) == seq_len, "freqs_cis seq_len mismatch");
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TORCH_CHECK(freqs_cis.size(2) == head_dim / 2, "freqs_cis dim/2 mismatch");
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TORCH_CHECK(freqs_cis.size(3) == 2, "freqs_cis last dim must be 2 [cos, sin]");
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auto out = torch::empty_like(x);
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int half_dim = head_dim / 2;
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int total = batch * seq_len * n_heads * half_dim;
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int block = 256;
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int grid = std::min((total + block - 1) / block, 1024);
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rotary_emb_kernel<<<grid, block, 0, stream>>>(
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reinterpret_cast<const __nv_bfloat16*>(x.data_ptr()),
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freqs_cis.data_ptr<float>(),
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reinterpret_cast<__nv_bfloat16*>(out.data_ptr()),
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batch, seq_len, n_heads, head_dim
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);
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C10_CUDA_CHECK(cudaGetLastError());
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return out;
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}
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PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
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m.def("rotary_emb", &rotary_emb,
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py::arg("x"),
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py::arg("freqs_cis"),
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"Fused rotary embedding (bf16 x, f32 freqs_cis [b,s,d/2,2], bf16 out)"
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);
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}
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