ViperEkura cc36530c73 perf: group-split register-blocking gqa_prefill kernel ... - one query row per group of G=8 lanes, each owning HEAD_DIM/G dims of qreg[]/acc[] in registers - removes full 32-lane warp_reduce_sum; S dot reduces over only G lanes - templated on <HEAD_DIM,G,ROWS,P_BC>, block=(G,ROWS)=(8,32) - per-group shuffle mask so causal loop-bound divergence doesn't deadlock the shuffle - update pure-C test to the templated launch		2026-07-06 18:33:08 +08:00
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kernels	perf: group-split register-blocking gqa_prefill kernel	2026-07-06 18:33:08 +08:00
tests	perf: group-split register-blocking gqa_prefill kernel	2026-07-06 18:33:08 +08:00
__init__.py	feat: add optional CUDA kernel system (csrc/) + fused GQA decode attention	2026-07-06 12:09:58 +08:00
build.py	fix: correct gqa_decode_attn reduction + add gqa_prefill_attn	2026-07-06 13:45:18 +08:00