281 lines
13 KiB
Plaintext
281 lines
13 KiB
Plaintext
#pragma once
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#include "gqa_common.cuh"
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#include "gqa_mma_utils.cuh"
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// Tensor-core prefill flash attention (raw mma.sync PTX).
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// One warp owns BR=16 query rows. S = Q@K^T and O = P@V run on bf16 tensor
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// cores via mma.sync.m16n8k16 (f32 accumulate). Q fragments are loaded once
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// straight from global into the mma A-operand layout (no smem staging) and
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// kept resident in registers across the tile loop. S, O, and the online-softmax
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// stats (m, l) also live in registers.
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// Shared memory is statically sized via template parameters — no dynamic
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// allocation. The mma fragment layout is used directly: the S accumulator
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// (f32) maps element-for-element onto the P matrix_a (bf16) operand, so
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// softmax needs no shuffle repack; row reductions fold across the 4-lane
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// thread group. Templated on <HEAD_DIM, WARPS, BC, MIN_BLOCKS> with BC a
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// multiple of 16.
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//
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// Occupancy: __launch_bounds__ forces the compiler to fit MIN_BLOCKS blocks/SM,
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// spilling to local memory as needed. MIN_BLOCKS is tuned per HEAD_DIM to the
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// double-buffered smem footprint (2*BC*LD for each of K/V).
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//
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// Software pipeline: K/V are double-buffered and loaded via cp.async one tile
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// ahead, so the next tile streams from global memory while the current tile's
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// tensor-core math runs — hiding load latency (long_scoreboard). A single
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// __syncthreads per tile both publishes the freshly loaded tile cross-warp and
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// (because it runs before the next prefetch) guards the buffer being refilled,
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// so no second barrier is needed. Predicated cp.async (cp_async_16_pred)
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// zero-fills rows past kv_len, unifying full and partial tiles on one path.
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//
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// Optimizations: load Q fragments directly from global in mma A-operand layout
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// (no sQ staging, no prologue barriers); pre-scale Q by attention scale during Q load; packed bf16x2 output stores;
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// causal tile skipping (block-level prefetch bound + warp-level compute skip);
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// XOR swizzle (swiz_col) → eliminates ldmatrix bank conflicts without LD
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// padding (LD=HEAD_DIM).
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template <int HEAD_DIM, int WARPS, int BC, int MIN_BLOCKS>
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__global__ __launch_bounds__(WARPS * 32, MIN_BLOCKS)
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void gqa_prefill_attn_mma_kernel(GQAParams p) {
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constexpr int BR = 16;
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constexpr int KD = HEAD_DIM / 16; // Q/K k-tiles
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constexpr int NC8 = BC / 8; // S n-tiles (N=8 each)
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constexpr int KT2 = BC / 16; // P k-tiles (K=16 each)
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constexpr int DN8 = HEAD_DIM / 8; // O n-tiles (N=8 each)
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constexpr int LD = HEAD_DIM; // XOR swizzle (swiz_col) handles bank conflicts
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constexpr int SWIZ_MASK = (HEAD_DIM >= 64) ? 7 : (HEAD_DIM / 8 - 1); // chunk bits, stay within LD
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const int warp = threadIdx.x / 32;
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const int lane = threadIdx.x % 32;
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const int gid = lane >> 2; // 0..7 → rows gid, gid+8
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const int tid4 = lane & 3; // 0..3
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const int nthreads = WARPS * 32;
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const int q_head = blockIdx.y;
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const int batch = blockIdx.z;
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const int kv_head = q_head / (p.q_head / p.kv_head);
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const int qrow0 = (blockIdx.x * WARPS + warp) * BR;
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// Static shared memory — sized by template parameters at compile time.
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// K/V are double-buffered (STAGES=2): the next tile's cp.async load runs
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// while the current tile's tensor-core math executes, hiding global-load
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// latency (FA2-style software pipeline). No dynamic smem / carveout opt-in.
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constexpr int STAGES = 2;
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__shared__ __align__(16) bf16 sK[STAGES * BC * LD];
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__shared__ __align__(16) bf16 sV[STAGES * BC * LD];
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// Load the Q fragments straight from global into the mma A-operand layout
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// (m16n8k16, row-major): no sQ staging area and no serialized per-warp
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// prologue barriers. Each lane reads exactly the 8 Q elements ldmatrix
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// would have produced, pre-scaled by the attention scale. Kept resident in
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// registers across the tile loop.
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// frag[0]/[2]: row = qrow0 + gid ; frag[1]/[3]: row = qrow0 + gid + 8
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// frag[0]/[1]: cols kt*16 + tid4*2 + {0,1} ; frag[2]/[3]: + 8
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const int q_base = ((batch * p.q_head + q_head) * p.q_len) * HEAD_DIM;
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const int qra = qrow0 + gid;
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const int qrb = qrow0 + gid + 8;
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const bool va = qra < p.q_len, vb = qrb < p.q_len;
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unsigned Qa[KD][4];
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#pragma unroll
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for (int kt = 0; kt < KD; kt++) {
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int c = kt * 16 + tid4 * 2;
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const bf16* pa = &p.q[q_base + qra * HEAD_DIM + c];
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const bf16* pb = &p.q[q_base + qrb * HEAD_DIM + c];
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Qa[kt][0] = va ? pk2(__bfloat162float(pa[0]) * p.scale,
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__bfloat162float(pa[1]) * p.scale) : 0u;
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Qa[kt][1] = vb ? pk2(__bfloat162float(pb[0]) * p.scale,
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__bfloat162float(pb[1]) * p.scale) : 0u;
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Qa[kt][2] = va ? pk2(__bfloat162float(pa[8]) * p.scale,
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__bfloat162float(pa[9]) * p.scale) : 0u;
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Qa[kt][3] = vb ? pk2(__bfloat162float(pb[8]) * p.scale,
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__bfloat162float(pb[9]) * p.scale) : 0u;
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}
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float Oacc[DN8][4];
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#pragma unroll
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for (int j = 0; j < DN8; j++)
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Oacc[j][0] = Oacc[j][1] = Oacc[j][2] = Oacc[j][3] = 0.0f;
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float m0 = -FLT_MAX, m1 = -FLT_MAX, l0 = 0.0f, l1 = 0.0f;
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const int kv_base = ((batch * p.kv_head + kv_head) * p.kv_len) * HEAD_DIM;
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const int tiles = (p.kv_len + BC - 1) / BC;
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const int qr0 = qrow0 + gid; // row for c0/c1
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const int qr1 = qrow0 + gid + 8; // row for c2/c3
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// Causal tile-skip bounds (no-op when is_causal == 0)
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const int use_skip = p.is_causal;
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const int max_kv = qrow0 + BR - 1 + p.causal_offset;
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const int block_max_kv =
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blockIdx.x * WARPS * BR + WARPS * BR - 1 + p.causal_offset;
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const int has_mask = p.use_mask && p.mask;
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const int mb = batch * p.kv_len;
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// Last active tile: block-level causal bound (all warps in the block share
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// the K/V load, so the prefetch range is the block max, not per-warp).
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int t_end = tiles - 1;
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if (use_skip) {
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int bt = block_max_kv / BC;
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if (bt < t_end) t_end = bt;
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}
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constexpr int VEC = 8; // bf16 per cp.async unit (16 bytes)
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constexpr int TOTAL = BC * HEAD_DIM;
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// Issue cp.async loads for tile `ti` into shared buffer `buf`. Predicated
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// loads zero-fill rows past kv_len, so partial tiles need no scalar path.
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auto load_tile = [&](int ti, int buf) {
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int kv0 = ti * BC;
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bf16* dK = sK + buf * BC * LD;
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bf16* dV = sV + buf * BC * LD;
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#pragma unroll
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for (int i = threadIdx.x * VEC; i < TOTAL; i += nthreads * VEC) {
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int r = i / HEAD_DIM, d = i % HEAD_DIM;
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int kc = kv0 + r;
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bool valid = kc < p.kv_len;
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int off = r * LD + swiz_col(d, r, SWIZ_MASK);
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cp_async_16_pred(&dK[off], &p.k[kv_base + kc * HEAD_DIM + d], valid);
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cp_async_16_pred(&dV[off], &p.v[kv_base + kc * HEAD_DIM + d], valid);
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}
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cp_async_commit();
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};
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// Prologue: kick off the first tile's load.
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load_tile(0, 0);
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for (int ti = 0; ti <= t_end; ti++) {
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int buf = ti & 1;
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// Wait for the current tile's async copies, then a single barrier: it
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// both publishes this tile's data cross-warp AND guarantees the prior
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// compute on the buffer we are about to refill has finished. Issuing
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// the next tile's load *after* this barrier lets one barrier cover both
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// hazards (vs two), while the load still overlaps this tile's math.
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cp_async_wait_group<0>();
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__syncthreads();
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if (ti < t_end) load_tile(ti + 1, (ti + 1) & 1);
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const bf16* bK = sK + buf * BC * LD;
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const bf16* bV = sV + buf * BC * LD;
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int kv0 = ti * BC;
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// Warp-level causal skip
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if (!use_skip || kv0 <= max_kv) {
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// S = Q @ K^T → Sacc[n8][0..3] (n8: 8 kv cols each)
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float Sacc[NC8][4];
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#pragma unroll
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for (int n8 = 0; n8 < NC8; n8++) {
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Sacc[n8][0] = Sacc[n8][1] = Sacc[n8][2] = Sacc[n8][3] = 0.0f;
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int krow_l = n8 * 8 + (lane & 7);
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int kcol_h = (lane & 8) ? 8 : 0;
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#pragma unroll
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for (int kt = 0; kt < KD; kt++) {
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unsigned b[2];
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ldmatrix_x2(b, &bK[krow_l * LD + swiz_col(kt * 16 + kcol_h, krow_l, SWIZ_MASK)]);
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mma16816(Sacc[n8], Qa[kt], b, Sacc[n8]);
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}
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}
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// ---- online softmax (in registers) ----
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// Q is pre-scaled, so Sacc already includes the attention scale.
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int maxc0 = p.is_causal ? min(p.kv_len, qr0 + p.causal_offset + 1)
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: p.kv_len;
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int maxc1 = p.is_causal ? min(p.kv_len, qr1 + p.causal_offset + 1)
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: p.kv_len;
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float rmax0 = -FLT_MAX, rmax1 = -FLT_MAX;
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#pragma unroll
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for (int n8 = 0; n8 < NC8; n8++) {
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int cc = kv0 + n8 * 8 + 2 * tid4;
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int c1 = cc + 1;
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bool b0 = (cc >= maxc0) || (has_mask && !p.mask[mb + cc]);
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bool b1 = (c1 >= maxc0) || (has_mask && !p.mask[mb + c1]);
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bool b2 = (cc >= maxc1) || (has_mask && !p.mask[mb + cc]);
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bool b3 = (c1 >= maxc1) || (has_mask && !p.mask[mb + c1]);
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float s0 = b0 ? -FLT_MAX : Sacc[n8][0];
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float s1 = b1 ? -FLT_MAX : Sacc[n8][1];
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float s2 = b2 ? -FLT_MAX : Sacc[n8][2];
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float s3 = b3 ? -FLT_MAX : Sacc[n8][3];
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Sacc[n8][0] = s0; Sacc[n8][1] = s1;
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Sacc[n8][2] = s2; Sacc[n8][3] = s3;
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rmax0 = fmaxf(rmax0, fmaxf(s0, s1));
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rmax1 = fmaxf(rmax1, fmaxf(s2, s3));
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}
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rmax0 = fmaxf(rmax0, __shfl_xor_sync(0xFFFFFFFF, rmax0, 1));
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rmax0 = fmaxf(rmax0, __shfl_xor_sync(0xFFFFFFFF, rmax0, 2));
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rmax1 = fmaxf(rmax1, __shfl_xor_sync(0xFFFFFFFF, rmax1, 1));
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rmax1 = fmaxf(rmax1, __shfl_xor_sync(0xFFFFFFFF, rmax1, 2));
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float nm0 = fmaxf(m0, rmax0), nm1 = fmaxf(m1, rmax1);
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float corr0 = (nm0 == -FLT_MAX) ? 1.0f : __expf(m0 - nm0);
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float corr1 = (nm1 == -FLT_MAX) ? 1.0f : __expf(m1 - nm1);
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float rsum0 = 0.0f, rsum1 = 0.0f;
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#pragma unroll
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for (int n8 = 0; n8 < NC8; n8++) {
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float p0 = (Sacc[n8][0] == -FLT_MAX) ? 0.0f
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: __expf(Sacc[n8][0] - nm0);
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float p1 = (Sacc[n8][1] == -FLT_MAX) ? 0.0f
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: __expf(Sacc[n8][1] - nm0);
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float p2 = (Sacc[n8][2] == -FLT_MAX) ? 0.0f
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: __expf(Sacc[n8][2] - nm1);
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float p3 = (Sacc[n8][3] == -FLT_MAX) ? 0.0f
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: __expf(Sacc[n8][3] - nm1);
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Sacc[n8][0] = p0; Sacc[n8][1] = p1;
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Sacc[n8][2] = p2; Sacc[n8][3] = p3;
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rsum0 += p0 + p1;
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rsum1 += p2 + p3;
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}
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rsum0 += __shfl_xor_sync(0xFFFFFFFF, rsum0, 1);
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rsum0 += __shfl_xor_sync(0xFFFFFFFF, rsum0, 2);
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rsum1 += __shfl_xor_sync(0xFFFFFFFF, rsum1, 1);
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rsum1 += __shfl_xor_sync(0xFFFFFFFF, rsum1, 2);
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l0 = l0 * corr0 + rsum0;
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l1 = l1 * corr1 + rsum1;
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m0 = nm0; m1 = nm1;
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// rescale O accumulator by per-row correction
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#pragma unroll
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for (int j = 0; j < DN8; j++) {
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Oacc[j][0] *= corr0; Oacc[j][1] *= corr0;
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Oacc[j][2] *= corr1; Oacc[j][3] *= corr1;
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}
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// O += P @ V
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#pragma unroll
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for (int kt2 = 0; kt2 < KT2; kt2++) {
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unsigned Pa[4];
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Pa[0] = pk2(Sacc[kt2 * 2][0], Sacc[kt2 * 2][1]);
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Pa[1] = pk2(Sacc[kt2 * 2][2], Sacc[kt2 * 2][3]);
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Pa[2] = pk2(Sacc[kt2 * 2 + 1][0], Sacc[kt2 * 2 + 1][1]);
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Pa[3] = pk2(Sacc[kt2 * 2 + 1][2], Sacc[kt2 * 2 + 1][3]);
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int vrow_l = kt2 * 16 + (lane & 15);
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#pragma unroll
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for (int dn8 = 0; dn8 < DN8; dn8++) {
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unsigned b[2];
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ldmatrix_x2_trans(b, &bV[vrow_l * LD + swiz_col(dn8 * 8, vrow_l, SWIZ_MASK)]);
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mma16816(Oacc[dn8], Pa, b, Oacc[dn8]);
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}
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}
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} // if active (warp-level causal skip)
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}
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// ---- write output ---- (packed bf16x2 stores: one 32-bit STG per pair,
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// halves store count and removes the uncoalesced scalar-store penalty)
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float rl0 = (l0 > 1e-20f) ? (1.0f / l0) : 0.0f;
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float rl1 = (l1 > 1e-20f) ? (1.0f / l1) : 0.0f;
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const int o_base = ((batch * p.q_head + q_head) * p.q_len) * HEAD_DIM;
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#pragma unroll
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for (int dn8 = 0; dn8 < DN8; dn8++) {
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int d = dn8 * 8 + 2 * tid4;
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if (qr0 < p.q_len) {
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__nv_bfloat162 v = __floats2bfloat162_rn(Oacc[dn8][0] * rl0,
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Oacc[dn8][1] * rl0);
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*reinterpret_cast<__nv_bfloat162*>(&p.o[o_base + qr0 * HEAD_DIM + d]) = v;
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}
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if (qr1 < p.q_len) {
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__nv_bfloat162 v = __floats2bfloat162_rn(Oacc[dn8][2] * rl1,
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Oacc[dn8][3] * rl1);
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*reinterpret_cast<__nv_bfloat162*>(&p.o[o_base + qr1 * HEAD_DIM + d]) = v;
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}
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}
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}
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