- fix scalar prefill head_dim=32 out-of-bounds via G=4 dispatch - fix MMA decode 4D mask head indexing and invalid-row mask access - add q_head/kv_head divisibility and head-dim contiguity checks - validate split-KV scratch and decode out_buf layout in bindings - set max dynamic shared memory for scalar decode D=256 - cover scalar prefill D=32 in pure C test
84 lines
3.5 KiB
Plaintext
84 lines
3.5 KiB
Plaintext
#include "attn_dispatchers.cuh"
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#include "attn_entry_utils.cuh"
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torch::Tensor attn_paged_decode(
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torch::Tensor q,
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torch::Tensor k_cache,
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torch::Tensor v_cache,
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torch::Tensor req_to_token,
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torch::Tensor req_pool_indices,
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torch::Tensor kv_indptr,
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int64_t max_seq_len,
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c10::optional<torch::Tensor> mask,
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int64_t causal_offset,
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double scale,
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c10::optional<torch::Tensor> o_part_buf,
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c10::optional<torch::Tensor> ml_part_buf,
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c10::optional<torch::Tensor> out_buf
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) {
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const at::cuda::OptionalCUDAGuard device_guard(device_of(q));
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auto stream = at::cuda::getCurrentCUDAStream();
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AttentionParams<bf16> p;
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attn_pack_paged_decode_params(q, k_cache, v_cache,
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req_to_token, req_pool_indices, kv_indptr,
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max_seq_len, mask, causal_offset, scale, p);
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torch::Tensor O;
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if (out_buf.has_value() && out_buf->defined()) {
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TORCH_CHECK(out_buf->dtype() == q.dtype(), "out_buf dtype must match q");
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TORCH_CHECK(out_buf->is_cuda() && out_buf->is_contiguous(),
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"out_buf must be a contiguous CUDA tensor");
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TORCH_CHECK(out_buf->size(0) >= q.size(0), "out_buf batch too small");
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TORCH_CHECK(out_buf->size(1) == q.size(1), "out_buf heads must match q");
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TORCH_CHECK(out_buf->size(2) == q.size(2), "out_buf head_dim must match q");
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TORCH_CHECK(q.is_contiguous(),
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"q must be contiguous when out_buf is provided");
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O = out_buf.value().slice(0, 0, q.size(0));
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} else {
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O = torch::empty({q.size(0), q.size(1), q.size(2)}, q.options());
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}
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p.o = (bf16*)O.data_ptr();
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if (o_part_buf.has_value() && ml_part_buf.has_value()
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&& o_part_buf->defined() && ml_part_buf->defined()) {
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TORCH_CHECK(o_part_buf->scalar_type() == torch::kFloat32, "o_part_buf must be f32");
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TORCH_CHECK(ml_part_buf->scalar_type() == torch::kFloat32, "ml_part_buf must be f32");
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int64_t o_needed = (int64_t)p.batch * p.q_head * MAX_SPLITS * p.head_dim;
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int64_t ml_needed = (int64_t)p.batch * p.q_head * MAX_SPLITS * 2;
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TORCH_CHECK(o_part_buf->numel() >= o_needed,
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"o_part_buf too small: need ", o_needed, " got ", o_part_buf->numel());
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TORCH_CHECK(ml_part_buf->numel() >= ml_needed,
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"ml_part_buf too small: need ", ml_needed, " got ", ml_part_buf->numel());
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TORCH_CHECK(o_part_buf->is_cuda() && ml_part_buf->is_cuda(),
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"split buffers must be CUDA tensors");
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TORCH_CHECK(o_part_buf->is_contiguous() && ml_part_buf->is_contiguous(),
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"split buffers must be contiguous");
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p.o_part = (float*)o_part_buf->data_ptr();
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p.ml_part = (float*)ml_part_buf->data_ptr();
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} else {
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alloc_split_partials(p);
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}
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DISPATCH_HEAD_DIM(p.head_dim, dispatch_paged_decode, p, stream);
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C10_CUDA_CHECK(cudaGetLastError());
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return O;
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}
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PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
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m.def("attn_paged_decode", &attn_paged_decode,
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py::arg("q"),
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py::arg("k_cache"),
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py::arg("v_cache"),
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py::arg("req_to_token"),
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py::arg("req_pool_indices"),
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py::arg("kv_indptr"),
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py::arg("max_seq_len"),
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py::arg("mask") = py::none(),
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py::arg("causal_offset") = -1,
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py::arg("scale") = 0.0,
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py::arg("o_part_buf") = py::none(),
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py::arg("ml_part_buf") = py::none(),
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py::arg("out_buf") = py::none(),
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"SGLang-style paged decode: flat KV pool + req_to_token + kv_indptr.");
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}
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