ViperEkura 988e01314d perf: pipeline prefill MMA kernel (double-buffered K/V + packed stores) ... - double-buffer K/V one tile ahead via cp.async to overlap load with tensor-core math (ncu long_scoreboard 2.12->0.53) - reorder wait->barrier->prefetch so one __syncthreads/tile covers both cross-warp publish and buffer-reuse (was two) - add predicated cp_async_16_pred (src-size=0 zero-fills OOB) to unify full/partial tiles, dropping the scalar fallback - halve BC to 16 to keep 3 blocks/SM despite the doubled smem - pack adjacent bf16 output into one 32-bit STG, removing the uncoalesced scalar-store penalty (14%->5% sectors) - result vs torch SDPA: prefill 0.61-0.78x -> 0.70-0.82x, spills eliminated		2026-07-10 12:19:14 +08:00
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kernels	perf: pipeline prefill MMA kernel (double-buffered K/V + packed stores)	2026-07-10 12:19:14 +08:00
tests	perf: reduce MMA kernel registers, switch to static smem	2026-07-10 00:39:47 +08:00
__init__.py	feat: add optional CUDA kernel system (csrc/) + fused GQA decode attention	2026-07-06 12:09:58 +08:00
build.py	perf: add fast-math and vectorization nvcc/cxx build flags	2026-07-07 22:28:32 +08:00