119 lines
3.9 KiB
Plaintext
119 lines
3.9 KiB
Plaintext
#include <cuda_bf16.h>
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#include <cuda_runtime.h>
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#include <cmath>
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#include <cfloat>
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#include <torch/extension.h>
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using bf16 = __nv_bfloat16;
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__inline__ __device__ float warp_reduce_sum(float val) {
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for (int offset = 16; offset > 0; offset >>= 1)
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val += __shfl_xor_sync(0xFFFFFFFF, val, offset);
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return val;
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}
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__global__ void gqa_prefill_attn_kernel(
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const bf16* __restrict__ q_ptr,
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const bf16* __restrict__ k_ptr,
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const bf16* __restrict__ v_ptr,
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const bool* __restrict__ mask_ptr,
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bf16* __restrict__ out_ptr,
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int B, int n_heads, int n_kv_heads, int q_len, int kv_len, int hd,
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int use_mask, int is_causal, int causal_offset
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) {
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int flat_id = blockIdx.x;
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int pos = flat_id % q_len;
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flat_id /= q_len;
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int q_head = flat_id % n_heads;
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int batch = flat_id / n_heads;
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int kv_head = q_head / (n_heads / n_kv_heads);
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int lane = threadIdx.x;
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int hd_per_thread = hd / 32;
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// each thread handles hd/32 elements of Q
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float q_reg[8];
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int q_off = ((batch * n_heads + q_head) * q_len + pos) * hd + lane * hd_per_thread;
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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q_reg[i] = __bfloat162float(q_ptr[q_off + i]);
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int kv_base = ((batch * n_kv_heads + kv_head) * kv_len) * hd;
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int limit = is_causal ? min(pos + causal_offset + 1, kv_len) : kv_len;
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float m = -FLT_MAX, d = 0.0f, acc_reg[8] = {0.0f};
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float scale = rsqrtf((float)hd);
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int mask_stride = q_len * kv_len;
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int mask_off = batch * mask_stride + pos * kv_len;
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for (int s = 0; s < limit; s++) {
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float partial = 0.0f;
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int k_off = kv_base + s * hd + lane * hd_per_thread;
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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partial += q_reg[i] * __bfloat162float(k_ptr[k_off + i]);
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partial = warp_reduce_sum(partial) * scale;
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if (use_mask && !mask_ptr[mask_off + s]) partial = -FLT_MAX;
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float new_m = fmaxf(m, partial);
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float alpha = expf(m - new_m);
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float beta = expf(partial - new_m);
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d = d * alpha + beta;
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int v_off = kv_base + s * hd + lane * hd_per_thread;
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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acc_reg[i] = acc_reg[i] * alpha + __bfloat162float(v_ptr[v_off + i]) * beta;
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m = new_m;
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}
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int out_off = ((batch * n_heads + q_head) * q_len + pos) * hd + lane * hd_per_thread;
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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out_ptr[out_off + i] = __float2bfloat16(acc_reg[i] / d);
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}
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torch::Tensor gqa_prefill_attn(
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torch::Tensor q, torch::Tensor k, torch::Tensor v,
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c10::optional<torch::Tensor> mask,
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bool is_causal = false, int64_t causal_offset = 0,
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c10::optional<double> scale = c10::nullopt
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) {
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TORCH_CHECK(q.is_cuda() && k.is_cuda() && v.is_cuda());
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TORCH_CHECK(q.dtype() == torch::kBFloat16);
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TORCH_CHECK(k.dtype() == torch::kBFloat16);
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TORCH_CHECK(v.dtype() == torch::kBFloat16);
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int B = q.size(0), n_heads = q.size(1), q_len = q.size(2), hd = q.size(3);
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int n_kv = k.size(1), kv_len = k.size(2);
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TORCH_CHECK(hd % 32 == 0, "head_dim must be multiple of 32");
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bool use_mask = mask.has_value();
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const bool* mask_ptr = nullptr;
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if (use_mask) {
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TORCH_CHECK(mask.value().dtype() == torch::kBool);
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mask_ptr = mask.value().data_ptr<bool>();
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}
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auto out = torch::empty_like(q);
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dim3 block(32);
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dim3 grid(B * n_heads * q_len);
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gqa_prefill_attn_kernel<<<grid, block>>>(
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reinterpret_cast<const bf16*>(q.data_ptr()),
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reinterpret_cast<const bf16*>(k.data_ptr()),
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reinterpret_cast<const bf16*>(v.data_ptr()),
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mask_ptr,
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reinterpret_cast<bf16*>(out.data_ptr()),
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B, n_heads, n_kv, q_len, kv_len, hd,
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(int)use_mask, (int)is_causal, (int)causal_offset
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);
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return out;
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}
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PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
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m.def("gqa_prefill_attn", &gqa_prefill_attn, "GQA prefill attention (naive)");
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}
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