- bypass shared mapping for contiguous attention - centralize paged Q tile broadcast in KV policy helpers
213 lines
8.7 KiB
Plaintext
213 lines
8.7 KiB
Plaintext
#pragma once
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#include <cuda_bf16.h>
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#include "attn_common.h"
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// ============================================================================
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// KVSource policies — the single dimension along which the paged and
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// non-paged attention kernels differ. Each kernel is templated on one of
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// these (ContigKV / PagedKV) and stays fully generic: the policy owns every
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// place where "where does K/V live" and "what is this request's seq_len"
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// are answered. All methods are __host__ __device__ so the same policy
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// serves both the device kernels (addressing, seq_len) and the host-side
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// launchers (grid / split computation).
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//
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// ContigKV: K/V are dense [batch, kv_head, kv_len, head_dim] tensors.
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// Params fields used: k, v, kv_stride_*, kv_len, q_len,
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// q_b_stride, causal_offset.
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// PagedKV: K/V live in a flat pool [size, kv_head, head_dim] indexed via
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// req_to_token. Params fields used: k_cache, v_cache,
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// req_to_token, req_pool_indices, kv_indptr, qo_indptr,
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// max_context_len, q_l_stride.
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//
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// Addressing state that is constant across a whole kernel invocation for one
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// (batch, kv_head) pair is captured once by make_ctx<HEAD_DIM>() and passed
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// to kv_addr, so the load loops never redo the hoistable base computation
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// (e.g. the req_pool_indices global read) element-by-element.
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// ============================================================================
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// Every policy method is static + callable from both host and device code.
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#define HOST_DEV_FORCEINLINE static __host__ __device__ __forceinline__
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using bf16 = __nv_bfloat16;
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// Hoisted per-(batch, kv_head) addressing context.
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struct KVContext {
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int kv_base; // contig: batch*kv_b_stride + kv_head*kv_h_stride
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int64_t req_idx; // paged: req_pool_indices[batch]
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int64_t rtt_stride; // paged: max_context_len
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int64_t pool_stride; // paged: kv_head * HEAD_DIM
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int64_t head_off; // paged: kv_head * HEAD_DIM
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};
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// Per-element K/V global addresses for one (kc, d) position of a K/V tile.
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// The pointers are ALWAYS the computed addresses (never nullptr) — callers
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// gate on `valid` (cp.async src_size=0, or a guarded scalar deref). `valid`
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// starts as "within the request's seq_len"; the paged policy further degrades
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// it when req_to_token maps the position to a negative slot (empty padding).
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// This matches the original hand-rolled load loops, where the address was
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// always formed and the predicate decided whether anything was read.
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struct KVAddr {
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const void* k;
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const void* v;
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bool valid;
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};
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// ---- Contiguous K/V ----
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struct ContigKV {
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static constexpr bool kPaged = false;
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// host-side length hooks (grid + split computation in the launchers)
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HOST_DEV_FORCEINLINE int host_q_blocks(const AttentionParams<bf16>& p, int rows) {
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return (p.q_len + rows - 1) / rows;
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}
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template <int ROWS>
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HOST_DEV_FORCEINLINE bool map_q_tile(const AttentionParams<bf16>&,
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int flat_tile, int grid_batch,
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int& batch, int& q_tile) {
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batch = grid_batch;
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q_tile = flat_tile;
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return true;
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}
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HOST_DEV_FORCEINLINE int host_kv_len(const AttentionParams<bf16>& p) {
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return p.kv_len;
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}
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// prefill: element offset of the request's Q rows (kernel adds qrow*q_l_stride)
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HOST_DEV_FORCEINLINE int q_base(
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const AttentionParams<bf16>& p, int batch, int q_head) {
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return batch * p.q_b_stride + q_head * p.q_h_stride;
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}
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// decode: same offset (q_len == 1, so there is no row stride component)
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HOST_DEV_FORCEINLINE int q_decode_base(
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const AttentionParams<bf16>& p, int batch, int q_head) {
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return batch * p.q_b_stride + q_head * p.q_h_stride;
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}
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HOST_DEV_FORCEINLINE int kv_len(const AttentionParams<bf16>& p, int batch) {
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return p.kv_len;
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}
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HOST_DEV_FORCEINLINE int q_len(const AttentionParams<bf16>& p, int batch) {
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return p.q_len;
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}
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HOST_DEV_FORCEINLINE int causal_offset(const AttentionParams<bf16>& p, int batch) {
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return p.causal_offset;
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}
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// decode: exclusive bound of the single query's attend range
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HOST_DEV_FORCEINLINE int decode_attend_len(const AttentionParams<bf16>& p, int batch) {
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return (p.kv_len < p.causal_offset + 1) ? p.kv_len : (p.causal_offset + 1);
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}
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template <int HEAD_DIM>
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HOST_DEV_FORCEINLINE KVContext make_ctx(
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const AttentionParams<bf16>& p, int batch, int kv_head) {
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KVContext c = {};
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c.kv_base = batch * p.kv_b_stride + kv_head * p.kv_h_stride;
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return c;
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}
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HOST_DEV_FORCEINLINE KVAddr kv_addr(
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const AttentionParams<bf16>& p, const KVContext& c, int kc, int d, bool valid) {
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const int g_off = c.kv_base + kc * p.kv_l_stride + d * p.kv_d_stride;
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return {&p.k_ptr[g_off], &p.v_ptr[g_off], valid};
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}
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};
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// ---- Paged (SGLang-style flat pool) K/V ----
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struct PagedKV {
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static constexpr bool kPaged = true;
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HOST_DEV_FORCEINLINE int host_q_blocks(const AttentionParams<bf16>& p, int rows) {
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// sum(ceil(q_len[b] / rows)) <= ceil(total_q / rows) + batch - 1.
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return (p.q_len + rows - 1) / rows + p.batch - 1;
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}
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template <int ROWS>
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HOST_DEV_FORCEINLINE bool map_q_tile(const AttentionParams<bf16>& p,
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int flat_tile, int,
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int& batch, int& q_tile) {
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int tile_base = 0;
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for (int b = 0; b < p.batch; ++b) {
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int len = p.qo_indptr[b + 1] - p.qo_indptr[b];
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int tiles = (len + ROWS - 1) / ROWS;
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if (flat_tile < tile_base + tiles) {
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batch = b;
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q_tile = flat_tile - tile_base;
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return true;
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}
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tile_base += tiles;
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}
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return false;
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}
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HOST_DEV_FORCEINLINE int host_kv_len(const AttentionParams<bf16>& p) {
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return p.max_context_len;
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}
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// prefill: Q rows start at qo_indptr[batch] (ragged batch base)
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HOST_DEV_FORCEINLINE int q_base(
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const AttentionParams<bf16>& p, int batch, int q_head) {
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return p.qo_indptr[batch] * p.q_l_stride + q_head * p.q_h_stride;
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}
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// decode: Q is [batch, q_head, head_dim], so batch is the outer row
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HOST_DEV_FORCEINLINE int q_decode_base(
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const AttentionParams<bf16>& p, int batch, int q_head) {
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return batch * p.q_l_stride + q_head * p.q_h_stride;
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}
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HOST_DEV_FORCEINLINE int kv_len(const AttentionParams<bf16>& p, int batch) {
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return p.kv_indptr[batch + 1] - p.kv_indptr[batch];
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}
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HOST_DEV_FORCEINLINE int q_len(const AttentionParams<bf16>& p, int batch) {
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return p.qo_indptr[batch + 1] - p.qo_indptr[batch];
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}
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HOST_DEV_FORCEINLINE int causal_offset(const AttentionParams<bf16>& p, int batch) {
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return kv_len(p, batch) - q_len(p, batch);
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}
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// decode: the query is the last token, so [0, seq_len) IS its causal range
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HOST_DEV_FORCEINLINE int decode_attend_len(const AttentionParams<bf16>& p, int batch) {
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return kv_len(p, batch);
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}
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template <int HEAD_DIM>
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HOST_DEV_FORCEINLINE KVContext make_ctx(
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const AttentionParams<bf16>& p, int batch, int kv_head) {
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KVContext c = {};
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c.req_idx = p.req_pool_indices[batch];
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c.rtt_stride = (int64_t)p.max_context_len;
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c.pool_stride = (int64_t)p.kv_head * HEAD_DIM;
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c.head_off = (int64_t)kv_head * HEAD_DIM;
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return c;
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}
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HOST_DEV_FORCEINLINE KVAddr kv_addr(
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const AttentionParams<bf16>& p, const KVContext& c, int kc, int d, bool valid) {
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const int64_t slot = valid ? p.req_to_token[c.req_idx * c.rtt_stride + kc] : 0;
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const bool ok = valid && (slot >= 0);
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const int64_t gmem_off = slot * c.pool_stride + c.head_off + d;
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return {&p.k_ptr[gmem_off], &p.v_ptr[gmem_off], ok};
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}
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};
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// ---- Q-block mapping ----
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// Contiguous grids map directly to (batch, q_tile). Paged grids flatten the
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// ragged Q tiles, so one thread resolves the request and broadcasts it.
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template <int ROWS, typename KV>
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__device__ __forceinline__ bool map_q_block(
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const AttentionParams<bf16>& p, int& batch, int& q_tile) {
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if constexpr (!KV::kPaged) {
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batch = blockIdx.z;
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q_tile = blockIdx.x;
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return true;
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} else {
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__shared__ int mapped_batch;
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__shared__ int mapped_q_tile;
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if ((threadIdx.x | threadIdx.y) == 0) {
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mapped_batch = -1;
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KV::template map_q_tile<ROWS>(
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p, blockIdx.x, blockIdx.z, mapped_batch, mapped_q_tile);
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}
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__syncthreads();
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batch = mapped_batch;
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q_tile = mapped_q_tile;
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return batch >= 0;
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}
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}
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