AstrAI

Commit Graph

Author	SHA1	Message	Date
ViperEkura	f1cc7cedce	feat: ldmatrix + smem padding for mma prefill kernel - replace scalar fragment loads with ldmatrix.sync.x4/x2 - add smem row-stride padding (LD = HEAD_DIM + 8) to eliminate 8-way bank conflicts from HEAD_DIM being a 32-bank multiple - switch build flag from positive to negative: -DASTRAI_NO_MMA for pre-sm_80 only; mma is the default path - vectorize scalar path smem loads with float4 ld8 - fix pure-C test configs for ld8 alignment	2026-07-06 20:55:22 +08:00
ViperEkura	ddc4bd1cf6	feat: tensor-core mma prefill with build-time dispatch - add register-resident flash-attention kernel using mma.sync.m16n8k16 - dispatch mma vs scalar at build time: pre-sm_80 defines -DASTRAI_NO_MMA, else defaults to mma - scalar path vectorized with float4 smem loads (ld8)	2026-07-06 20:33:24 +08:00

Author

SHA1

Message

Date

ViperEkura

f1cc7cedce

feat: ldmatrix + smem padding for mma prefill kernel

- replace scalar fragment loads with ldmatrix.sync.x4/x2
- add smem row-stride padding (LD = HEAD_DIM + 8) to eliminate 8-way bank conflicts from HEAD_DIM being a 32-bank multiple
- switch build flag from positive to negative: -DASTRAI_NO_MMA for pre-sm_80 only; mma is the default path
- vectorize scalar path smem loads with float4 ld8
- fix pure-C test configs for ld8 alignment

2026-07-06 20:55:22 +08:00

ViperEkura

ddc4bd1cf6

feat: tensor-core mma prefill with build-time dispatch

- add register-resident flash-attention kernel using mma.sync.m16n8k16
- dispatch mma vs scalar at build time: pre-sm_80 defines
  -DASTRAI_NO_MMA, else defaults to mma
- scalar path vectorized with float4 smem loads (ld8)

2026-07-06 20:33:24 +08:00

2 Commits