perf: flatten paged prefill tile dispatch
- remove the host-provided max_q_len argument - dispatch only the ragged prefill tile upper bound - validate the rebuilt CUDA backend end to end
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@@ -23,7 +23,7 @@ struct AttentionParams {
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int q_head;
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int kv_head;
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int head_dim;
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int q_len; // Contiguous mode; paged mode uses qo_indptr.
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int q_len; // Per-request in contiguous mode; total_q in paged mode.
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int kv_len; // Contiguous mode; paged mode uses kv_indptr.
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// Attention behavior
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@@ -66,6 +66,4 @@ struct AttentionParams {
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AT* __restrict__ o_part;
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AT* __restrict__ ml_part;
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// Host-provided paged prefill grid bound
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int max_q_len;
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};
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