feat: paged decode attention with split-KV (scalar + MMA)
- PagedAttentionParams merged into attn_common.h - Scalar variant: warp-per-query-head split-KV, resolves page table per-position for the K/V shared-memory tile load - MMA variant (sm_80+): tensor-core head-packing with cp.async, single page-table lookup per tile (BC=32 fits within page_size>=32) - Standalone test: 14 cases across head_dim 32/64/128/256, GQA, multi-batch, both paths verified against CPU reference
This commit is contained in:
@@ -14,11 +14,39 @@ struct AttentionParams {
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int causal_offset;
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int num_splits;
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float scale;
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const T* __restrict__ q;
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const T* __restrict__ k;
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const T* __restrict__ v;
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const bool* __restrict__ mask;
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T* __restrict__ o;
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AT* __restrict__ o_part;
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AT* __restrict__ ml_part;
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};
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template<typename T, typename AT = float>
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struct PagedAttentionParams {
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int batch;
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int q_head;
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int kv_head;
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int q_len;
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int kv_len;
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int head_dim;
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int use_mask;
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int is_causal;
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int causal_offset;
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float scale;
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int num_splits;
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int page_size;
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int max_pages;
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const T* __restrict__ q;
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const T* __restrict__ k_cache;
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const T* __restrict__ v_cache;
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const bool* __restrict__ mask;
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const int64_t* __restrict__ page_table;
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T* __restrict__ o;
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AT* __restrict__ o_part;
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@@ -0,0 +1,152 @@
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#include "attn_paged_decode_split_kv.cuh"
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#ifndef ASTRAI_NO_MMA
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#include "attn_paged_decode_split_kv_mma.cuh"
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#endif
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#include <torch/extension.h>
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#include <c10/cuda/CUDAGuard.h>
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static int paged_decode_num_splits(int base_blocks, int tiles_total) {
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int sm_count = 0;
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cudaDeviceGetAttribute(&sm_count, cudaDevAttrMultiProcessorCount, 0);
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int n = (2 * sm_count + base_blocks - 1) / base_blocks;
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return std::max(1, std::min(n, std::min(tiles_total, 32)));
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}
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static void launch_paged_scalar_decode(PagedAttentionParams<bf16>& p) {
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int group_size = p.q_head / p.kv_head;
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int chunks_total = (p.kv_len + PDC_CHUNK - 1) / PDC_CHUNK;
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p.num_splits = paged_decode_num_splits(p.batch * p.kv_head, chunks_total);
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auto fopt = torch::TensorOptions().dtype(torch::kFloat32).device(torch::kCUDA);
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auto o_part = torch::empty({p.batch, p.q_head, p.num_splits, p.head_dim}, fopt);
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auto ml_part = torch::empty({p.batch, p.q_head, p.num_splits, 2}, fopt);
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p.o_part = o_part.data_ptr<float>();
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p.ml_part = ml_part.data_ptr<float>();
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size_t smem = PDC_CHUNK * p.head_dim * sizeof(bf16);
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paged_attn_decode_split_kv_kernel<<<
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dim3(p.batch * p.kv_head, 1, p.num_splits),
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dim3(32, group_size),
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smem>>>(p);
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paged_attn_decode_combine_kernel<<<p.batch * p.q_head, p.head_dim>>>(p);
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}
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#ifndef ASTRAI_NO_MMA
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template <int HEAD_DIM, int BC>
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static void launch_paged_mma_decode(PagedAttentionParams<bf16>& p) {
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int tiles_total = (p.kv_len + BC - 1) / BC;
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p.num_splits = paged_decode_num_splits(p.batch * p.kv_head, tiles_total);
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auto fopt = torch::TensorOptions().dtype(torch::kFloat32).device(torch::kCUDA);
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auto o_part = torch::empty({p.batch, p.q_head, p.num_splits, p.head_dim}, fopt);
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auto ml_part = torch::empty({p.batch, p.q_head, p.num_splits, 2}, fopt);
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p.o_part = o_part.data_ptr<float>();
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p.ml_part = ml_part.data_ptr<float>();
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paged_attn_decode_split_kv_mma_kernel<HEAD_DIM, BC>
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<<<dim3(p.kv_head, p.batch, p.num_splits), 32>>>(p);
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paged_attn_decode_combine_kernel<<<p.batch * p.q_head, p.head_dim>>>(p);
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}
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#endif
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template <int HEAD_DIM>
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static void dispatch_paged_decode(PagedAttentionParams<bf16>& p) {
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#ifndef ASTRAI_NO_MMA
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int G = p.q_head / p.kv_head;
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if (!p.use_mask && G >= 1 && G <= 16 && p.page_size >= 32) {
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launch_paged_mma_decode<HEAD_DIM, 32>(p);
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return;
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}
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#endif
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launch_paged_scalar_decode(p);
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}
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torch::Tensor attn_paged_decode(
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torch::Tensor q,
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torch::Tensor page_table,
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torch::Tensor k_cache,
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torch::Tensor v_cache,
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int64_t page_size,
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int64_t kv_len,
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c10::optional<torch::Tensor> mask,
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bool is_causal = false,
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int64_t causal_offset = 0,
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c10::optional<double> scale = c10::nullopt
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) {
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const at::cuda::OptionalCUDAGuard device_guard(device_of(q));
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int batch = q.size(0);
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int q_head = q.size(1);
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int head_dim = q.size(3);
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int kv_head = k_cache.size(3);
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int max_pages = page_table.size(1);
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TORCH_CHECK(q.is_cuda() && page_table.is_cuda() && k_cache.is_cuda() && v_cache.is_cuda());
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TORCH_CHECK(q.dtype() == torch::kBFloat16, "q must be bf16");
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TORCH_CHECK(k_cache.dtype() == torch::kBFloat16, "k_cache must be bf16");
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TORCH_CHECK(v_cache.dtype() == torch::kBFloat16, "v_cache must be bf16");
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TORCH_CHECK(page_table.dtype() == torch::kLong, "page_table must be int64");
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TORCH_CHECK(q.size(2) == 1, "Q seq_len must be 1 (decode)");
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TORCH_CHECK(head_dim % 32 == 0, "head_dim must be multiple of 32");
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TORCH_CHECK(k_cache.size(1) == page_size,
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"k_cache dim 1 must equal page_size, got ",
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k_cache.size(1), " vs ", page_size);
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TORCH_CHECK(k_cache.size(0) >= 0, "k_cache must have at least 0 pages");
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float scale_val = scale.has_value()
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? static_cast<float>(scale.value())
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: 1.0f / std::sqrt(static_cast<float>(head_dim));
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auto O = torch::empty_like(q);
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PagedAttentionParams<bf16, float> p;
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p.batch = batch;
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p.q_head = q_head;
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p.kv_head = kv_head;
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p.q_len = 1;
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p.kv_len = static_cast<int>(kv_len);
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p.head_dim = head_dim;
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p.use_mask = (mask.has_value() && mask.value().defined()) ? 1 : 0;
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p.is_causal = is_causal ? 1 : 0;
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p.causal_offset = static_cast<int>(causal_offset);
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p.num_splits = 1;
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p.scale = scale_val;
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p.page_size = static_cast<int>(page_size);
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p.max_pages = max_pages;
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p.page_table = page_table.data_ptr<int64_t>();
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p.k_cache = reinterpret_cast<const bf16*>(k_cache.data_ptr());
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p.v_cache = reinterpret_cast<const bf16*>(v_cache.data_ptr());
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p.q = reinterpret_cast<const bf16*>(q.data_ptr());
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p.mask = p.use_mask ? mask.value().data_ptr<bool>() : nullptr;
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p.o = reinterpret_cast<bf16*>(O.data_ptr());
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p.o_part = nullptr;
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p.ml_part = nullptr;
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switch (p.head_dim) {
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case 32: dispatch_paged_decode<32>(p); break;
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case 64: dispatch_paged_decode<64>(p); break;
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case 128: dispatch_paged_decode<128>(p); break;
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case 256: dispatch_paged_decode<256>(p); break;
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default:
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TORCH_CHECK(false, "paged_decode: unsupported head_dim ", p.head_dim,
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" (supported: 32, 64, 128, 256)");
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}
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return O;
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}
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PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
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m.def("attn_paged_decode", &attn_paged_decode,
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py::arg("q"),
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py::arg("page_table"),
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py::arg("k_cache"),
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py::arg("v_cache"),
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py::arg("page_size"),
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py::arg("kv_len"),
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py::arg("mask") = py::none(),
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py::arg("is_causal") = false,
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py::arg("causal_offset") = 0,
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py::arg("scale") = py::none(),
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"Paged GQA decode — split-KV with direct page-table access.");
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}
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@@ -0,0 +1,140 @@
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#pragma once
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#include <cuda_bf16.h>
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#include <float.h>
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#include "attn_common.h"
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using bf16 = __nv_bfloat16;
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constexpr int PDC_CHUNK = 64;
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__device__ inline float paged_warp_reduce_sum(float val) {
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for (int offset = 16; offset > 0; offset >>= 1)
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val += __shfl_xor_sync(0xFFFFFFFF, val, offset);
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return val;
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}
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// Split-KV scalar decode: one warp per query head, grid.z partitions KV.
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__global__ void paged_attn_decode_split_kv_kernel(PagedAttentionParams<bf16> p) {
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int batch = blockIdx.x / p.kv_head;
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int kv_head = blockIdx.x % p.kv_head;
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int split = blockIdx.z;
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int group_size = blockDim.y;
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int q_head = kv_head * group_size + threadIdx.y;
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int lane = threadIdx.x;
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int hd_per_thread = p.head_dim / 32;
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float q_reg[8];
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int q_off = ((batch * p.q_head + q_head) * 1) * p.head_dim + lane * hd_per_thread;
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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q_reg[i] = __bfloat162float(p.q[q_off + i]);
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float m = -FLT_MAX, d = 0.0f, acc_reg[8] = {0.0f};
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extern __shared__ __align__(16) bf16 k_smem[];
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int chunks_total = (p.kv_len + PDC_CHUNK - 1) / PDC_CHUNK;
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int chunks_per_split = (chunks_total + p.num_splits - 1) / p.num_splits;
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int ch_begin = split * chunks_per_split;
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int ch_end = min(chunks_total, ch_begin + chunks_per_split);
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const int mask_base = batch * p.kv_len;
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for (int ci = ch_begin; ci < ch_end; ci++) {
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int chunk_start = ci * PDC_CHUNK;
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int this_chunk = min(PDC_CHUNK, p.kv_len - chunk_start);
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int total = this_chunk * p.head_dim;
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for (int i = threadIdx.y * 32 + lane; i < total; i += blockDim.x * blockDim.y) {
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int s = i / p.head_dim;
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int d_dim = i % p.head_dim;
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int pos = chunk_start + s;
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int logical_page = pos / p.page_size;
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int page_offset = pos % p.page_size;
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int phys_page = p.page_table[batch * p.max_pages + logical_page];
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if (phys_page >= 0) {
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int64_t off = (int64_t)phys_page * p.page_size * p.kv_head * p.head_dim
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+ (int64_t)page_offset * p.kv_head * p.head_dim
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+ (int64_t)kv_head * p.head_dim
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+ d_dim;
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k_smem[i] = p.k_cache[off];
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} else {
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k_smem[i] = __float2bfloat16(0.0f);
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}
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}
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__syncthreads();
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for (int s = 0; s < this_chunk; s++) {
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float partial = 0.0f;
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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partial += q_reg[i] * __bfloat162float(k_smem[s * p.head_dim + lane * hd_per_thread + i]);
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partial = paged_warp_reduce_sum(partial) * p.scale;
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if (p.use_mask && p.mask && !p.mask[mask_base + chunk_start + s])
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partial = -FLT_MAX;
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if (p.is_causal && (chunk_start + s) > p.causal_offset)
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partial = -FLT_MAX;
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float new_m = fmaxf(m, partial);
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float alpha = expf(m - new_m);
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float beta = expf(partial - new_m);
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d = d * alpha + beta;
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int pos = chunk_start + s;
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int logical_page = pos / p.page_size;
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int page_offset = pos % p.page_size;
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int phys_page = p.page_table[batch * p.max_pages + logical_page];
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if (phys_page >= 0) {
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int64_t v_base = (int64_t)phys_page * p.page_size * p.kv_head * p.head_dim
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+ (int64_t)page_offset * p.kv_head * p.head_dim
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+ (int64_t)kv_head * p.head_dim;
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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acc_reg[i] = acc_reg[i] * alpha + __bfloat162float(p.v_cache[v_base + lane * hd_per_thread + i]) * beta;
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} else {
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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acc_reg[i] = acc_reg[i] * alpha + 0.0f * beta;
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}
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m = new_m;
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}
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__syncthreads();
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}
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size_t bh = (size_t)batch * p.q_head + q_head;
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size_t slot = bh * p.num_splits + split;
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int d0 = lane * hd_per_thread;
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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p.o_part[slot * p.head_dim + (d0 + i)] = acc_reg[i];
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if (lane == 0) {
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p.ml_part[slot * 2] = m;
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p.ml_part[slot * 2 + 1] = d;
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}
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}
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__global__ void paged_attn_decode_combine_kernel(PagedAttentionParams<bf16> p) {
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int bh = blockIdx.x;
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int d = threadIdx.x;
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if (d >= p.head_dim) return;
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size_t split_base = (size_t)bh * p.num_splits;
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const float* mlp = p.ml_part + split_base * 2;
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const float* op = p.o_part + split_base * p.head_dim;
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float m = -FLT_MAX, l = 0.0f, acc = 0.0f;
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for (int s = 0; s < p.num_splits; s++) {
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float mi = mlp[s * 2];
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if (mi <= -FLT_MAX) continue;
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float li = mlp[s * 2 + 1];
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float nm = fmaxf(m, mi);
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float corr = __expf(m - nm);
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float e = __expf(mi - nm);
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acc = acc * corr + op[s * p.head_dim + d] * e;
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l = l * corr + li * e;
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m = nm;
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}
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float inv = (l > 1e-20f) ? (1.0f / l) : 0.0f;
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p.o[(size_t)bh * p.head_dim + d] = __float2bfloat16(acc * inv);
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}
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@@ -0,0 +1,174 @@
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#pragma once
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#include <cfloat>
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#include <cuda_bf16.h>
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#include "attn_common.h"
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#include "attn_mma_utils.cuh"
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using bf16 = __nv_bfloat16;
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// Paged split-KV tensor-core decode via GQA head-packing.
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// Identical algorithm to attn_decode_split_kv_mma_kernel but reads K/V
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// directly from the page pool through a page table, eliminating the gather
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// copy. Each tile (BC=32) fits within a single page (page_size >= 32), so
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// the page-table lookup happens once per tile for cp.async.
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template <int HEAD_DIM, int BC>
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__global__ void paged_attn_decode_split_kv_mma_kernel(PagedAttentionParams<bf16> p) {
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constexpr int BR = 16;
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constexpr int KD = HEAD_DIM / 16;
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constexpr int NC8 = BC / 8;
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constexpr int KT2 = BC / 16;
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constexpr int DN8 = HEAD_DIM / 8;
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constexpr int LD = HEAD_DIM;
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constexpr int SWIZ_MASK = (HEAD_DIM >= 64) ? 7 : (HEAD_DIM / 8 - 1);
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const int lane = threadIdx.x;
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const int gid = lane >> 2;
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const int tid4 = lane & 3;
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const int kv_head_idx = blockIdx.x;
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const int batch = blockIdx.y;
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const int split = blockIdx.z;
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const int G = p.q_head / p.kv_head;
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const int q_head0 = kv_head_idx * G;
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__shared__ __align__(16) bf16 sK[BC * HEAD_DIM];
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__shared__ __align__(16) bf16 sV[BC * HEAD_DIM];
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__shared__ __align__(16) bf16 sQ[BR * HEAD_DIM];
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// ---- load Q into registers via ldmatrix ----
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for (int i = lane; i < BR * HEAD_DIM; i += 32) {
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int r = i / HEAD_DIM, d = i % HEAD_DIM;
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bf16 val = __float2bfloat16(0.0f);
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if (r < G) {
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int qh = q_head0 + r;
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val = p.q[(batch * p.q_head + qh) * HEAD_DIM + d];
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}
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sQ[r * LD + swiz_col(d, r, SWIZ_MASK)] = val;
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}
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__syncwarp();
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unsigned Qa[KD][4];
|
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int qrow_l = (lane & 7) + (lane & 8);
|
||||
int qcol_l = (lane & 16) ? 8 : 0;
|
||||
#pragma unroll
|
||||
for (int kt = 0; kt < KD; kt++)
|
||||
ldmatrix_x4(Qa[kt], &sQ[qrow_l * LD + swiz_col(kt * 16 + qcol_l, qrow_l, SWIZ_MASK)]);
|
||||
|
||||
float Oacc[DN8][4];
|
||||
#pragma unroll
|
||||
for (int j = 0; j < DN8; j++)
|
||||
Oacc[j][0] = Oacc[j][1] = Oacc[j][2] = Oacc[j][3] = 0.0f;
|
||||
float m0 = -FLT_MAX, m1 = -FLT_MAX, l0 = 0.0f, l1 = 0.0f;
|
||||
|
||||
const int mask_base = batch * p.kv_len;
|
||||
const int tiles_total = (p.kv_len + BC - 1) / BC;
|
||||
const int tiles_per_split = (tiles_total + p.num_splits - 1) / p.num_splits;
|
||||
const int ti_begin = split * tiles_per_split;
|
||||
const int ti_end = min(tiles_total, ti_begin + tiles_per_split);
|
||||
const int has_mask = p.use_mask && p.mask;
|
||||
|
||||
// Paged strides (constant for the block)
|
||||
const int64_t page_stride = (int64_t)p.page_size * p.kv_head * HEAD_DIM;
|
||||
const int64_t pos_stride = (int64_t)p.kv_head * HEAD_DIM;
|
||||
const int64_t head_off = (int64_t)kv_head_idx * HEAD_DIM;
|
||||
|
||||
for (int ti = ti_begin; ti < ti_end; ti++) {
|
||||
int kv0 = ti * BC;
|
||||
|
||||
// phys_page is constant for the whole tile (BC <= page_size).
|
||||
int logical_page = kv0 / p.page_size;
|
||||
int phys_page = p.page_table[batch * p.max_pages + logical_page];
|
||||
bool page_valid = (phys_page >= 0);
|
||||
|
||||
bool full_tile = page_valid && (kv0 + BC <= p.kv_len);
|
||||
if (full_tile) {
|
||||
constexpr int VEC = 8;
|
||||
int total = BC * HEAD_DIM;
|
||||
#pragma unroll
|
||||
for (int i = lane * VEC; i < total; i += 32 * VEC) {
|
||||
int r = i / HEAD_DIM, d = i % HEAD_DIM;
|
||||
int kc = kv0 + r;
|
||||
int page_off = kc % p.page_size;
|
||||
int64_t gmem_base = (int64_t)phys_page * page_stride
|
||||
+ (int64_t)page_off * pos_stride
|
||||
+ head_off;
|
||||
cp_async_16(&sK[r * LD + swiz_col(d, r, SWIZ_MASK)],
|
||||
&p.k_cache[gmem_base + d]);
|
||||
cp_async_16(&sV[r * LD + swiz_col(d, r, SWIZ_MASK)],
|
||||
&p.v_cache[gmem_base + d]);
|
||||
}
|
||||
cp_async_commit();
|
||||
cp_async_wait_all();
|
||||
} else {
|
||||
for (int i = lane; i < BC * HEAD_DIM; i += 32) {
|
||||
int r = i / HEAD_DIM, d = i % HEAD_DIM;
|
||||
int kc = kv0 + r;
|
||||
bf16 z = __float2bfloat16(0.0f);
|
||||
if (kc < p.kv_len && page_valid) {
|
||||
int page_off = kc % p.page_size;
|
||||
int64_t gmem_base = (int64_t)phys_page * page_stride
|
||||
+ (int64_t)page_off * pos_stride
|
||||
+ head_off;
|
||||
sK[r * LD + swiz_col(d, r, SWIZ_MASK)] = p.k_cache[gmem_base + d];
|
||||
sV[r * LD + swiz_col(d, r, SWIZ_MASK)] = p.v_cache[gmem_base + d];
|
||||
} else {
|
||||
sK[r * LD + swiz_col(d, r, SWIZ_MASK)] = z;
|
||||
sV[r * LD + swiz_col(d, r, SWIZ_MASK)] = z;
|
||||
}
|
||||
}
|
||||
}
|
||||
__syncwarp();
|
||||
|
||||
float Sacc[NC8][4];
|
||||
mma_compute_scores<KD, NC8>(Qa, sK, LD, SWIZ_MASK, lane, Sacc);
|
||||
|
||||
#pragma unroll
|
||||
for (int n8 = 0; n8 < NC8; n8++)
|
||||
Sacc[n8][0] *= p.scale, Sacc[n8][1] *= p.scale,
|
||||
Sacc[n8][2] *= p.scale, Sacc[n8][3] *= p.scale;
|
||||
|
||||
int maxc = p.is_causal ? min(p.kv_len, p.causal_offset + 1) : p.kv_len;
|
||||
mma_softmax_tile<NC8, DN8>(kv0, maxc, maxc,
|
||||
mask_base, p.mask, has_mask,
|
||||
Sacc, Oacc, m0, m1, l0, l1, lane);
|
||||
|
||||
mma_pv_accumulate<DN8, KT2>(Sacc, sV, LD, SWIZ_MASK, lane, Oacc);
|
||||
__syncwarp();
|
||||
}
|
||||
|
||||
// ---- write UN-normalised partials for this split ----
|
||||
auto split_slot = [&](int h) -> size_t {
|
||||
size_t bh = (size_t)batch * p.q_head + h;
|
||||
return bh * p.num_splits + split;
|
||||
};
|
||||
#pragma unroll
|
||||
for (int dn8 = 0; dn8 < DN8; dn8++) {
|
||||
int d = dn8 * 8 + 2 * tid4;
|
||||
int r0 = gid, r1 = gid + 8;
|
||||
if (r0 < G) {
|
||||
int h = q_head0 + r0;
|
||||
float* op = p.o_part + split_slot(h) * HEAD_DIM;
|
||||
op[d] = Oacc[dn8][0];
|
||||
op[d + 1] = Oacc[dn8][1];
|
||||
}
|
||||
if (r1 < G) {
|
||||
int h = q_head0 + r1;
|
||||
float* op = p.o_part + split_slot(h) * HEAD_DIM;
|
||||
op[d] = Oacc[dn8][2];
|
||||
op[d + 1] = Oacc[dn8][3];
|
||||
}
|
||||
}
|
||||
if (tid4 == 0) {
|
||||
int r0 = gid, r1 = gid + 8;
|
||||
if (r0 < G) {
|
||||
int h = q_head0 + r0;
|
||||
float* mp = p.ml_part + split_slot(h) * 2;
|
||||
mp[0] = m0; mp[1] = l0;
|
||||
}
|
||||
if (r1 < G) {
|
||||
int h = q_head0 + r1;
|
||||
float* mp = p.ml_part + split_slot(h) * 2;
|
||||
mp[0] = m1; mp[1] = l1;
|
||||
}
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user