fix: resolve audited dispatch, kernel, and rollout bugs

- re-register the linear family with the operator dispatcher (ASTR_OPS / op_backend / resolve)
- fix bf16 gemv misaligned-address faults and element mispairing for offset weights
- reject misaligned bf16_swiglu inputs with a clear error and fall back in the backend gate
- make the rollout reuse decision, validation, and return atomic under one policy snapshot
- add the documented post-scoring rollout version check
- derive live+1 under the scheduler lock in optimizer_step via apply_weight_update(None, ...)
- reject rollout_max_policy_lag below rollout_interval - 1 at config time
- sync gemv stream-test inputs before switching streams; drop dead loader imports

csrc/kernels/bf16_swiglu.cu

@@ -170,6 +170,26 @@ torch::Tensor bf16_swiglu(
             gate_weight.is_contiguous(),
         "x and weights must be contiguous"
     );
+    // The kernel loads all three streams as uint4; contiguous-but-offset
+    // views would fault with an opaque "misaligned address" CUDA error, so
+    // reject them here with an actionable message.
+    TORCH_CHECK(
+        (reinterpret_cast<uintptr_t>(x.data_ptr()) & 15u) == 0u,
+        "bf16_swiglu requires 16-byte aligned x (storage_offset must keep "
+        "data_ptr divisible by 16); clone the tensor or use the torch path"
+    );
+    TORCH_CHECK(
+        (reinterpret_cast<uintptr_t>(up_weight.data_ptr()) & 15u) == 0u,
+        "bf16_swiglu requires 16-byte aligned up_weight (storage_offset "
+        "must keep data_ptr divisible by 16); clone the tensor or use the "
+        "torch path"
+    );
+    TORCH_CHECK(
+        (reinterpret_cast<uintptr_t>(gate_weight.data_ptr()) & 15u) == 0u,
+        "bf16_swiglu requires 16-byte aligned gate_weight (storage_offset "
+        "must keep data_ptr divisible by 16); clone the tensor or use the "
+        "torch path"
+    );
     TORCH_CHECK(
         !x.requires_grad() && !up_weight.requires_grad() &&
             !gate_weight.requires_grad(),