feat: SGLang-style paged attention kernels replace page-table path
- PagedAttentionParams uses flat KV pool + req_to_token + kv_indptr/qo_indptr instead of page_table - MMA split-KV decode and split-Q prefill kernels with indirect ragged-batch addressing - Prefill kernel accepts 4D mask (causal-aware); decode kernel supports 2D mask - CudaBackend is inference-only: kv_cache=None raises, no torch fallback - benchmark.py: required --ckpt, --backend/--compare options - Parallel build isolates build-temp/build-lib per subprocess - Standalone test covers decode/prefill with mask, 27 cases pass
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@@ -5,6 +5,8 @@
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#include "attn_warp_utils.cuh"
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constexpr int PDC_CHUNK = 64;
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// Scalar paged decode (fallback for sm < 80, no tensor cores).
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// Reads K/V from flat pool via req_to_token indexing.
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template <int HEAD_DIM, bool IsCausal, bool HasMask>
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__global__ void paged_attn_decode_split_kv_kernel(PagedAttentionParams<bf16> p) {
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int batch = blockIdx.x / p.kv_head;
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@@ -15,8 +17,11 @@ __global__ void paged_attn_decode_split_kv_kernel(PagedAttentionParams<bf16> p)
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int lane = threadIdx.x;
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int hd_per_thread = p.head_dim / 32;
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const int seq_len = p.kv_indptr[batch + 1] - p.kv_indptr[batch];
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const int64_t req_idx = p.req_pool_indices[batch];
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float q_reg[8];
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int q_off = batch * p.q_stride_b + q_head * p.q_stride_h
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int q_off = batch * p.q_stride_l + q_head * p.q_stride_h
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+ lane * hd_per_thread * p.q_stride_d;
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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@@ -26,16 +31,19 @@ __global__ void paged_attn_decode_split_kv_kernel(PagedAttentionParams<bf16> p)
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extern __shared__ __align__(16) bf16 k_smem[];
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int chunks_total = (p.kv_len + PDC_CHUNK - 1) / PDC_CHUNK;
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int chunks_total = (seq_len + PDC_CHUNK - 1) / PDC_CHUNK;
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int chunks_per_split = (chunks_total + p.num_splits - 1) / p.num_splits;
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int ch_begin = split * chunks_per_split;
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int ch_end = min(chunks_total, ch_begin + chunks_per_split);
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const int mask_base = batch * p.mask_b_stride + q_head * p.mask_h_stride;
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const int mask_base = batch * p.mask_b_stride;
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const int64_t pool_stride = (int64_t)p.kv_head * p.head_dim;
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const int64_t head_off = (int64_t)kv_head * p.head_dim;
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const int64_t rtt_stride = (int64_t)p.max_context_len;
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for (int ci = ch_begin; ci < ch_end; ci++) {
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int chunk_start = ci * PDC_CHUNK;
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int this_chunk = min(PDC_CHUNK, p.kv_len - chunk_start);
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int this_chunk = min(PDC_CHUNK, seq_len - chunk_start);
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int total = this_chunk * p.head_dim;
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for (int i = threadIdx.y * 32 + lane; i < total;
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@@ -43,14 +51,9 @@ __global__ void paged_attn_decode_split_kv_kernel(PagedAttentionParams<bf16> p)
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int s = i / p.head_dim;
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int d_dim = i % p.head_dim;
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int pos = chunk_start + s;
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int logical_page = pos / p.page_size;
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int page_offset = pos % p.page_size;
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int phys_page = p.page_table[batch * p.max_pages + logical_page];
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if (phys_page >= 0) {
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int64_t off = (int64_t)phys_page * p.page_size * p.kv_head * p.head_dim
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+ (int64_t)page_offset * p.kv_head * p.head_dim
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+ (int64_t)kv_head * p.head_dim
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+ d_dim;
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int64_t slot = p.req_to_token[req_idx * rtt_stride + pos];
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if (slot >= 0) {
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int64_t off = slot * pool_stride + head_off + d_dim;
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k_smem[i] = p.k_cache[off];
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} else {
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k_smem[i] = __float2bfloat16(0.0f);
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@@ -85,17 +88,13 @@ __global__ void paged_attn_decode_split_kv_kernel(PagedAttentionParams<bf16> p)
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d = d * alpha + beta;
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int pos = chunk_start + s;
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int logical_page = pos / p.page_size;
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int page_offset = pos % p.page_size;
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int phys_page = p.page_table[batch * p.max_pages + logical_page];
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int64_t slot = p.req_to_token[req_idx * rtt_stride + pos];
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if (masked) {
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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acc_reg[i] = fmaf(acc_reg[i], alpha, 0.0f);
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} else if (phys_page >= 0) {
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int64_t v_base = (int64_t)phys_page * p.page_size * p.kv_head * p.head_dim
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+ (int64_t)page_offset * p.kv_head * p.head_dim
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+ (int64_t)kv_head * p.head_dim;
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} else if (slot >= 0) {
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int64_t v_base = slot * pool_stride + head_off;
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#pragma unroll
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for (int i = 0; i < hd_per_thread; i++)
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acc_reg[i] = fmaf(acc_reg[i], alpha,
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@@ -148,6 +147,6 @@ __global__ void paged_attn_decode_combine_kernel(PagedAttentionParams<bf16> p) {
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}
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float inv = (l > 1e-20f) ? (1.0f / l) : 0.0f;
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int o_off = batch * p.q_stride_b + q_head * p.q_stride_h + d * p.q_stride_d;
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int o_off = batch * p.q_stride_l + q_head * p.q_stride_h + d * p.q_stride_d;
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p.o[o_off] = __float2bfloat16(acc * inv);
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}
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