refactor: namespace csrc kernels and extract common helpers
- attention family -> astrai::attention; fp8 family -> astrai::fp8 - new common/reduce.cuh (warp/group reductions, atomic_max_float) - new common/cp_async.cuh (predicated cp_async_16, commit/wait group) - move MAX_SPLITS into attention/common.h; delete warp_utils.cuh - .cu bindings and pure C tests open family namespaces via using
This commit is contained in:
@@ -5,6 +5,12 @@
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#include <cuda_runtime.h>
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#include <cstdint>
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// Pure POD/traits header — no .cuh/CUDA-kernel includes; raw __nv_* type
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// spellings only.
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namespace astrai {
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namespace fp8 {
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// Compile-time FP8 format: E4M3 (forward / high precision, max 448) or
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// E5M2 (gradient / large dynamic range, max 57344).
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enum class FP8Format : int {
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@@ -64,3 +70,6 @@ struct FP8Params {
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int total;
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};
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} // namespace fp8
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} // namespace astrai
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+11
-59
@@ -10,8 +10,11 @@
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#include <type_traits>
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#include "common.h"
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#include "../common/cp_async.cuh"
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#include "../common/mma.cuh"
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#include "../common/reduce.cuh"
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namespace astrai {
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namespace fp8 {
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// m16n8k32 (see astrai::mma_shape<fp8 type>::k in common/mma.cuh)
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@@ -35,61 +38,9 @@ struct fp8_input<FP8Format::E5M2> {
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// FP8 MMA lives in the shared astrai::mma_sync template (common/mma.cuh);
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// instantiate it with fp8_input<Fmt>::type. Accumulates in-place: callers
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// pass the same accumulator array as both `d` and `c`.
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__device__ __forceinline__ void atomic_max_float(float* destination,
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float value) {
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if (destination)
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atomicMax(reinterpret_cast<unsigned*>(destination),
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__float_as_uint(value));
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}
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__device__ __forceinline__ float warp_reduce_max(float value) {
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#pragma unroll
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for (int offset = 16; offset; offset >>= 1) {
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value = fmaxf(value, __shfl_xor_sync(0xffffffffu, value, offset));
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}
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return value;
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}
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// One thread moves sixteen FP8 values (16 bytes) via cp.async.
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template <typename T>
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__device__ __forceinline__ void cp_async_16b(T* destination,
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const T* source, bool valid) {
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const unsigned shared_address = __cvta_generic_to_shared(destination);
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const uint4* source_vec = reinterpret_cast<const uint4*>(source);
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asm volatile("cp.async.cg.shared.global [%0], [%1], 16, %2;"
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:: "r"(shared_address), "l"(source_vec),
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"r"(valid ? 16 : 0));
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}
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// PTX requires wait_group's operand to be an immediate value. Keep it as a
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// template argument so the stage policy remains compile-time configurable.
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template <int KeepGroups>
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__device__ __forceinline__ void cp_async_wait_group() {
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static_assert(KeepGroups >= 0 && KeepGroups <= 7,
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"cp.async.wait_group supports immediates in [0, 7]");
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asm volatile("cp.async.wait_group %0;" :: "n"(KeepGroups));
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}
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template <int MaxKeepGroups>
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__device__ __forceinline__ void cp_async_wait_group_dispatch(int keep_groups) {
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static_assert(MaxKeepGroups >= 0 && MaxKeepGroups <= 7,
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"cp.async.wait_group supports immediates in [0, 7]");
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if (keep_groups == MaxKeepGroups) {
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cp_async_wait_group<MaxKeepGroups>();
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} else if constexpr (MaxKeepGroups > 0) {
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cp_async_wait_group_dispatch<MaxKeepGroups - 1>(keep_groups);
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} else {
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cp_async_wait_group<0>();
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}
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}
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template <int Stages>
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__device__ __forceinline__ void cp_async_commit_group() {
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static_assert(Stages >= 1 && Stages <= 8,
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"FP8 GEMM stages must be in the range [1, 8]");
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asm volatile("cp.async.commit_group;");
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}
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// warp_reduce_max / atomic_max_float (quantize amax) live in
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// common/reduce.cuh; the cp.async pipeline primitives (predicated 16-byte
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// copy, commit_group, wait_group + runtime dispatch) in common/cp_async.cuh.
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// ---------------------------------------------------------------------------
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// Quantize kernel: BF16 -> FP8 (E4M3 or E5M2), fused amax over raw values.
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@@ -252,7 +203,7 @@ __device__ __forceinline__ void load_operand_tile(
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const bool full = k_base + c + 15 < contract;
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if (row < rows && full &&
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(reinterpret_cast<uintptr_t>(src) & 15) == 0) {
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cp_async_16b(dst, src, true);
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astrai::cp_async_16(dst, src, true);
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} else {
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#pragma unroll
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for (int i = 0; i < 16; ++i)
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@@ -381,7 +332,7 @@ __global__ void __launch_bounds__(kWarps * 32, 2) fp8_gemm_kernel(FP8Params p) {
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for (int stage = 0; stage < kStages; ++stage) {
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if (stage < tile_count) {
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load_tile(stage, static_cast<int64_t>(stage) * kK);
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cp_async_commit_group<kStages>();
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astrai::cp_async_commit_group();
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}
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}
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@@ -393,7 +344,7 @@ __global__ void __launch_bounds__(kWarps * 32, 2) fp8_gemm_kernel(FP8Params p) {
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// oldest group (the current stage) ready for consumption.
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const int keep_groups =
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remaining < kStages - 1 ? static_cast<int>(remaining) : kStages - 1;
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cp_async_wait_group_dispatch<kStages - 1>(keep_groups);
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astrai::cp_async_wait_group_dispatch<kStages - 1>(keep_groups);
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// Barrier 1: every thread's cp.async for this stage is complete
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// before any thread reads tiles written by other threads.
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__syncthreads();
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@@ -438,7 +389,7 @@ __global__ void __launch_bounds__(kWarps * 32, 2) fp8_gemm_kernel(FP8Params p) {
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__syncthreads();
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if (tile_index + kStages < tile_count) {
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load_tile(stage, (tile_index + kStages) * kK);
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cp_async_commit_group<kStages>();
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astrai::cp_async_commit_group();
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}
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}
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@@ -517,3 +468,4 @@ void launch_fp8_gemm(const FP8Params& p, cudaStream_t stream) {
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}
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} // namespace fp8
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} // namespace astrai
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+14
-11
@@ -14,10 +14,13 @@
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#include "gemm.cuh"
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#include "../common/device.cuh"
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using namespace astrai::fp8;
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namespace {
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// FP8Format / FP8Params live in the global namespace (common.h); the
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// launchers live in fp8:: (gemm.cuh).
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// FP8Format / FP8Params and the launchers live in astrai::fp8 (common.h /
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// gemm.cuh); this TU opens the using-directive above so the binding reads
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// them unqualified.
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void check_fp8_device(const torch::Tensor& tensor) {
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static std::mutex mutex;
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@@ -102,7 +105,7 @@ void launch_gemm_variant(const FP8Params& p, cudaStream_t stream) {
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constexpr bool out_fp8 = (Variant & 4) != 0;
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constexpr bool trans_a = (Variant & 2) != 0;
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constexpr bool trans_b = (Variant & 1) != 0;
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fp8::launch_fp8_gemm<Fmt, out_fp8, trans_a, trans_b>(p, stream);
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launch_fp8_gemm<Fmt, out_fp8, trans_a, trans_b>(p, stream);
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}
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template <FP8Format Fmt>
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@@ -151,9 +154,9 @@ std::tuple<torch::Tensor, torch::Tensor> quantize_bf16(torch::Tensor x,
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pack_quantize_params(p, x_c.data_ptr(), x8.data_ptr(), scale, &amax,
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x_c.numel());
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if (fmt) {
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fp8::launch_fp8_quantize<FP8Format::E5M2>(p, stream.stream());
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launch_fp8_quantize<FP8Format::E5M2>(p, stream.stream());
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} else {
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fp8::launch_fp8_quantize<FP8Format::E4M3>(p, stream.stream());
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launch_fp8_quantize<FP8Format::E4M3>(p, stream.stream());
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}
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C10_CUDA_CHECK(cudaGetLastError());
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return {x8, amax};
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@@ -259,9 +262,9 @@ std::tuple<torch::Tensor, torch::Tensor, torch::Tensor> linear_forward_fp8(
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pack_quantize_params(qp, src.data_ptr(), dst.data_ptr(), scale, amax,
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src.numel());
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if (fmt) {
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fp8::launch_fp8_quantize<FP8Format::E5M2>(qp, stream.stream());
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launch_fp8_quantize<FP8Format::E5M2>(qp, stream.stream());
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} else {
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fp8::launch_fp8_quantize<FP8Format::E4M3>(qp, stream.stream());
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launch_fp8_quantize<FP8Format::E4M3>(qp, stream.stream());
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}
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};
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quantize(x_c, x8, sx, &amax_x);
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@@ -273,10 +276,10 @@ std::tuple<torch::Tensor, torch::Tensor, torch::Tensor> linear_forward_fp8(
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pack_gemm_params(p, x8.data_ptr(), w8.data_ptr(), out.data_ptr(), sx, sw,
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nullptr, m, n, k, k, k);
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if (fmt) {
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fp8::launch_fp8_gemm<FP8Format::E5M2, false, false, true>(
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launch_fp8_gemm<FP8Format::E5M2, false, false, true>(
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p, stream.stream());
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} else {
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fp8::launch_fp8_gemm<FP8Format::E4M3, false, false, true>(
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launch_fp8_gemm<FP8Format::E4M3, false, false, true>(
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p, stream.stream());
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}
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C10_CUDA_CHECK(cudaGetLastError());
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@@ -327,9 +330,9 @@ linear_backward_fp8(torch::Tensor g, torch::Tensor x, torch::Tensor w,
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pack_quantize_params(qp, src.data_ptr(), dst.data_ptr(), scale, amax,
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src.numel());
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if (fmt) {
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fp8::launch_fp8_quantize<FP8Format::E5M2>(qp, stream.stream());
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launch_fp8_quantize<FP8Format::E5M2>(qp, stream.stream());
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} else {
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fp8::launch_fp8_quantize<FP8Format::E4M3>(qp, stream.stream());
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launch_fp8_quantize<FP8Format::E4M3>(qp, stream.stream());
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}
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};
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// Four-layout backward: the gradient and activation tensors keep their
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