feat: wire up paged decode CUDA kernel to Python extension
- Add attn_paged_decode wrapper in ops.py with gather fallback - Register kernel in loader.py and export from __init__.py - Extract test_utils.cuh shared by all attention unit tests - Rename attn_paged_vs_contiguous.cu to attn_paged_decode_test.cu - Refactor decode/prefill tests to use common bf16 helpers and cpu ref - Fix k_cache dim check in attn_paged_decode.cu
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@@ -5,21 +5,12 @@ nvcc -I csrc -arch=sm_89 -O3 \
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csrc/tests/attn_prefill_test.cu -o test && ./test
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*/
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#include <cstdio>
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#include <cstdlib>
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#include <cmath>
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#include <sys/time.h>
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#include "test_utils.cuh"
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#include "../kernels/attn_prefill_split_q.cuh"
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#ifndef ASTRAI_NO_MMA
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#include "../kernels/attn_prefill_split_q_mma.cuh"
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#endif
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static double now_ms() {
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struct timeval tv;
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gettimeofday(&tv, NULL);
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return tv.tv_sec * 1000.0 + tv.tv_usec / 1000.0;
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}
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// Launch the production prefill path (tensor-core MMA on sm_80+, else the
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// scalar fallback), mirroring dispatch_prefill() in attn_prefill.cu.
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template <int HEAD_DIM>
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@@ -48,45 +39,6 @@ static void dispatch_prefill(AttentionParams<bf16>& p) {
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}
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}
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static void cpu_attention(const float* Q, const float* K, const float* V, float* O,
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int B, int Hq, int Hk, int q_len, int kv_len, int D,
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int is_causal, int causal_off) {
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float scale = 1.0f / sqrtf((float)D);
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int n_rep = Hq / Hk;
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for (int b = 0; b < B; b++) {
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for (int h = 0; h < Hq; h++) {
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for (int qi = 0; qi < q_len; qi++) {
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int kv_h = h / n_rep;
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float mv = -INFINITY, sv = 0.0f;
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float accum[256] = {0};
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int lim = is_causal ? min(kv_len, qi + causal_off + 1) : kv_len;
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for (int kj = 0; kj < lim; kj++) {
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float dot = 0.0f;
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for (int d = 0; d < D; d++)
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dot += Q[((b*Hq + h)*q_len + qi)*D + d]
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* K[((b*Hk + kv_h)*kv_len + kj)*D + d];
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dot *= scale;
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float nm = fmaxf(mv, dot);
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float al = expf(mv - nm);
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float be = expf(dot - nm);
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sv = sv * al + be;
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for (int d = 0; d < D; d++)
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accum[d] = accum[d] * al
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+ V[((b*Hk + kv_h)*kv_len + kj)*D + d] * be;
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mv = nm;
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}
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float inv = 1.0f / sv;
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for (int d = 0; d < D; d++)
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O[((b*Hq + h)*q_len + qi)*D + d] = accum[d] * inv;
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}
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}
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}
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}
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static __nv_bfloat16 f2bf(float x) { return __float2bfloat16(x); }
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static float bf2f(__nv_bfloat16 x) { return __bfloat162float(x); }
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static float randf() { return (float)rand() / (float)RAND_MAX - 0.5f; }
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// Warmed-up, CUDA-event timed throughput sweep over the production MMA path.
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// Reports per-call latency and effective tensor-core TFLOP/s (2 matmuls:
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// QK^T and P@V, each 2*B*Hq*ql*kl*D flops; halved for causal).
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@@ -208,7 +160,7 @@ int main() {
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cudaMemcpy(hOut,dO,nQ*2,cudaMemcpyDeviceToHost);
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float* ref=new float[nQ];
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cpu_attention(hQ,hK,hV,ref,B,Hq,Hk,ql,kl,D,causal,0);
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cpu_attention_ref(hQ, hK, hV, nullptr, ref, B, Hq, Hk, ql, kl, D, causal, 0);
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float max_err=0;
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for (size_t i=0;i<nQ;i++) {
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